Third-generation (3G) mobile phone technologies, such as Universal Mobile Telecommunications System (UMTS) and Wideband Code Division Multiple Access (WB-CDMA) standards represent extensions of the second-generation (2G) mobile phone technologies like the Global System for Mobile Communications (GSM) or Enhanced Data rates for GSM Evolution (EDGE). One aspect crossing all of the present standards of mobile phone technologies and reached from the one generation to the next (there from 2G to 3G) is that they are using non-constant envelope modulation. In communication systems with non-constant envelope modulation a problem resides in the non-linearity of the power amplifier (PA) in the transmitter stages, a solution of which are compensation measures resulting a low efficiency compared to constant-envelope transceivers.
The architecture of non-constant-envelope transceivers can, for instance, be linearized by feedback loops like Cartesian feedback or polar-loop feedback, which instantaneously measure the quality of the transceiver output signal and correct the input signal of the transceiver power amplifier (TX-PA) such that the quality with regard to linearity is improved. In this way the efficiency, Error Vector Magnitude (EVM), representing a measure used to quantify the performance of a phase-shift modulation radio demodulator, and Adjacent Channel Power Ratio (ACPR), defined as the ratio of the average power in the adjacent frequency channel to the average power in the transmitted frequency channel, may be optimized simultaneously.
However, present techniques implementing feedback loops like Cartesian feedback or polar-loop feedback require complex and expensive design of down-converters, filters, and control amplifiers. In the case that the correction is done in the digital domain, extra Analog-to-Digital- (A/D-) and Digital-to-Analog- (D/A-) converters are required. Apart from the design effort needed, also the extra power consumption and silicon area may be prohibitively high. Additionally, extra receiving paths have to be designed when Cartesian or polar feedback loops are used. Beside the complex design also the disadvantage of extra power consumption arises, which is caused by the components like low-noise amplifiers, mixers, Intermediate Frequency (IF) filters, and amplifier-stages, and if required also by extra Radio Frequency (RF) Voltage Controlled Oscillator (VCO) or Phase Locked Loop (PLL), A/D- and D/A-converters, and also by an extra silicon area associated with this extra feedback loop.